NC393 progress update: HDL code for sensor channels is ported or re-written
Quick update: a new chunk of code is added to the NC393 camera FPGA project. It is a second (of three needed to match the existing NC353 functionality) major parts of the system after the memory controller is finished. This code is just written, it still has to be verified by the simulation first, and then by synthesizing and by running it on the actual hardware. We plan to do that when the third part – image compressors will be ported to the new system too. The added code deals with receiving data from the image sensors and pre-processing it before storing in the video memory. FPGA-based systems are very flexible and many other configurations like support of multi-lane serial interface sensors or using several camera ports to connect a single large high-speed sensor are possible and will be implemented later. The table below summarizes parameters of the current code only.
| Feature | Value |
|---|---|
| Number of sensor ports | 4 |
| Total number of multiplexed sensors | 16 |
| Total number of multiplexed sensors with existing 10359 multiplexer board | 12 |
| Sensor interface type (implemented in HDL) | parallel 12 bits |
| Sensor interface hardware compatibility | parallel LVCMOS/serial differential 8 lanes + clock |
| Sensor interface voltage levels | programmable up to 3.3V |
| Number of I²C sequencers | 4 (1 per port) |
| Number of I²C sequencers frames | 16 |
| Number of I²C sequencers commands per frame | 64 |
| I²C sequencers commands data width | 16/8 bits |
| Image data width stored | 16/8 bits per pixel |
| Gamma conversion regions per port | 4 |
| Histograms: number of rectangular ROI (Regions of Interest) per port | 4 |
| Histograms: number of color channels | 4 |
| Histograms: number of bins per color | 256 |
| Histograms: width per bin | 18 or 32 bits |
| Histograms: number of histograms stored per sensor | 16 |